wazevo(arm64): fixes Vector select (#1839)

Signed-off-by: Takeshi Yoneda <t.y.mathetake@gmail.com>

internal/engine/wazevo/backend/isa/arm64/lower_instr.go

@@ -1909,7 +1909,7 @@ func (m *machine) lowerSelectVec(rc, rn, rm, rd operand) {
 	// First, we copy the condition to a temporary register in case rc is used somewhere else.
 	tmp := m.compiler.AllocateVReg(ssa.TypeI32)
 	mov := m.allocateInstr()
-	mov.asFpuMov128(tmp, rc.nr())
+	mov.asMove32(tmp, rc.nr())
 	m.insert(mov)
 
 	// Next is to clear the unnecessary bits of rc by ANDing it with 1, and store it to a temporary register.

internal/engine/wazevo/backend/isa/arm64/lower_instr_test.go

@@ -853,7 +853,7 @@ func TestMachine_lowerSelectVec(t *testing.T) {
 
 	m.lowerSelectVec(c, rn, rm, rd)
 	require.Equal(t, `
-mov v5?.16b, v1?.16b
+mov w5?, w1?
 and w6?, w5?, #0x1
 sub x7?, xzr, x6?
 dup v4?.2d, x7?