asm(arm64): fixes the source register of CMEQ(vector,zero) (#719)

Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>

internal/asm/arm64/impl.go

@@ -3442,9 +3442,13 @@ func (a *AssemblerImpl) encodeVectorRegisterToVectorRegister(n *nodeImpl) (err e
 	var srcVectorRegBits byte
 	if n.srcReg != RegRZR {
 		srcVectorRegBits, err = vectorRegisterBits(n.srcReg)
-		if err != nil {
-			return err
-		}
+	} else if n.instruction == CMEQZERO {
+		// CMEQZERO has RegRZR as the src, and we apply the instruction to the same register as the destination.
+		srcVectorRegBits, err = vectorRegisterBits(n.dstReg)
+	}
+
+	if err != nil {
+		return err
 	}
 
 	dstVectorRegBits, err := vectorRegisterBits(n.dstReg)

internal/asm/arm64/impl_1_test.go

@@ -1539,11 +1539,11 @@ func TestAssemblerImpl_EncodeVectorRegisterToVectorRegister(t *testing.T) {
 		},
 		{
 			x1:   RegRZR,
-			x2:   RegV30,
-			name: "cmeq v30.2d, v0.2d, #0",
+			x2:   RegV12,
+			name: "cmeq v12.2d, v12.2d, #0",
 			inst: CMEQZERO,
 			arr:  VectorArrangement2D,
-			exp:  []byte{0x1e, 0x98, 0xe0, 0x4e},
+			exp:  []byte{0x8c, 0x99, 0xe0, 0x4e},
 		},
 		{
 			name: "tbl v1.8b, {v0.16b}, v1.8b",

internal/integration_test/fuzzcases/fuzzcases_test.go

@@ -183,3 +183,16 @@ func Test717(t *testing.T) {
 		}
 	})
 }
+
+func Test719(t *testing.T) {
+	run(t, func(t *testing.T, r wazero.Runtime) {
+		mod, err := r.InstantiateModuleFromBinary(ctx, getWasmBinary(t, 719))
+		require.NoError(t, err)
+
+		f := mod.ExportedFunction("require unreachable")
+		require.NotNil(t, f)
+		_, err = f.Call(ctx)
+		require.Error(t, err)
+		require.Contains(t, err.Error(), "wasm error: unreachable\nwasm stack trace:")
+	})
+}

internal/integration_test/fuzzcases/testdata/719.wat

@@ -0,0 +1,9 @@
+(module
+  (func (export "require unreachable") (local v128) ;; having v128 local results in the non-trivial register allocation in the v128.const below.
+    v128.const i64x2 0x1 0x2
+    i64x2.all_true ;; must be non zero since i64x2(0x1, 0x2) is non zero on all lanes.
+    i32.eqz ;; must be 0 as the result ^ is not zero.
+    br_if 0 ;; return target, but the rseult of i32.eqz is zero, therefore branching shoulnd't happen.
+    unreachable ;; Hence, we reach this unreachable instruction.
+  )
+)