9a9b361ac8
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io> Signed-off-by: Adrian Cole <adrian@tetrate.io>
79 lines
2.3 KiB
Go
79 lines
2.3 KiB
Go
package compiler
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import (
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"github.com/tetratelabs/wazero/internal/asm"
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"github.com/tetratelabs/wazero/internal/asm/amd64"
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"github.com/tetratelabs/wazero/internal/wazeroir"
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)
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// compileConstV128 implements compiler.compileConstV128 for amd64 architecture.
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func (c *amd64Compiler) compileConstV128(o *wazeroir.OperationConstV128) error {
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c.maybeCompileMoveTopConditionalToFreeGeneralPurposeRegister()
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result, err := c.allocateRegister(registerTypeVector)
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if err != nil {
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return err
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}
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// We cannot directly load the value from memory to float regs,
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// so we move it to int reg temporarily.
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tmpReg, err := c.allocateRegister(registerTypeGeneralPurpose)
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if err != nil {
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return err
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}
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// Move the lower 64-bits.
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if o.Lo == 0 {
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c.assembler.CompileRegisterToRegister(amd64.XORQ, tmpReg, tmpReg)
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} else {
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c.assembler.CompileConstToRegister(amd64.MOVQ, int64(o.Lo), tmpReg)
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}
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c.assembler.CompileRegisterToRegister(amd64.MOVQ, tmpReg, result)
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if o.Lo != 0 && o.Hi == 0 {
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c.assembler.CompileRegisterToRegister(amd64.XORQ, tmpReg, tmpReg)
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} else if o.Hi != 0 {
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c.assembler.CompileConstToRegister(amd64.MOVQ, int64(o.Hi), tmpReg)
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}
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// Move the higher 64-bits with PINSRQ at the second element of 64x2 vector.
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c.assembler.CompileRegisterToRegisterWithArg(amd64.PINSRQ, tmpReg, result, 1)
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c.pushVectorRuntimeValueLocationOnRegister(result)
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return nil
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}
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// compileAddV128 implements compiler.compileAddV128 for amd64 architecture.
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func (c *amd64Compiler) compileAddV128(o *wazeroir.OperationAddV128) error {
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c.locationStack.pop() // skip higher 64-bits.
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x2 := c.locationStack.pop()
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if err := c.compileEnsureOnGeneralPurposeRegister(x2); err != nil {
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return err
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}
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c.locationStack.pop() // skip higher 64-bits.
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x1 := c.locationStack.pop()
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if err := c.compileEnsureOnGeneralPurposeRegister(x1); err != nil {
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return err
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}
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var inst asm.Instruction
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switch o.Shape {
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case wazeroir.ShapeI8x16:
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inst = amd64.PADDB
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case wazeroir.ShapeI16x8:
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inst = amd64.PADDW
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case wazeroir.ShapeI32x4:
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inst = amd64.PADDL
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case wazeroir.ShapeI64x2:
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inst = amd64.PADDQ
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case wazeroir.ShapeF32x4:
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inst = amd64.ADDPS
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case wazeroir.ShapeF64x2:
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inst = amd64.ADDPD
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}
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c.assembler.CompileRegisterToRegister(inst, x2.register, x1.register)
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c.pushVectorRuntimeValueLocationOnRegister(x1.register)
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c.locationStack.markRegisterUnused(x2.register)
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return nil
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}
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