Commit Graph

19 Commits

Author SHA1 Message Date
Takeshi Yoneda
c5daf5a218 interpreter,compiler(arm64): clears higher bits in i32.load_8/16_s (#725)
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
2022-07-28 15:45:07 +09:00
Takeshi Yoneda
41df6d9556 arm64: fix bounds check on v128.load{32,64}_zero. (#720)
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
2022-07-26 16:23:54 +09:00
Takeshi Yoneda
cbe6170473 compiler: always allocate register to save conditional values (#666)
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
2022-06-29 09:26:50 +09:00
Takeshi Yoneda
3b4544ee48 compiler: remove embedding of pointers of jump tables (#650)
This removes the embedding of pointers of jump tables (uintptr of []byte)
used by BrTable operations. That is the last usage of unsafe.Pointer in
compiler implementations.
Alternatively, we treat jump tables as asm.StaticConst and emit them
into the constPool already implemented and used by various places.

Notably, now the native code compiled by compilers can be reusable
across multiple processes, meaning that they are independent of
any runtime pointers.

Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
2022-06-23 13:42:46 +09:00
Takeshi Yoneda
b0588a98c9 Completes arm64 backend for SIMD instructions (#644)
This completes the implementation of arm64 backend for SIMD instructions.
Notably, now the arm64 compiler passes 100% of WebAssemby 2.0 draft
specification tests.

Combined with the completion of the interpreter and amd64 backend (#624),
this finally resolves #484. Therefore, this also documents that wazero is
100% compatible with WebAssembly 1.0 and 2.0.

Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
2022-06-21 10:51:02 +09:00
Takeshi Yoneda
3219832e5a arm64: dot and pseudo min/max instructions (#643)
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
2022-06-20 20:03:53 +09:00
Takeshi Yoneda
fdfcd47224 arm64: SIMD extadd, extmul, int-to-int/float-to-int conversions (#642)
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
2022-06-20 17:28:23 +09:00
Takeshi Yoneda
8a2776c2b4 arm64: implement SIMD Integer arithmetics (#641)
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
2022-06-20 15:04:20 +09:00
Takeshi Yoneda
2301afd94b arm64: FP SIMD arithmetic/rounding instructions (#634)
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
2022-06-20 09:08:08 +09:00
Takeshi Yoneda
cd00799b57 arm64: implement vector comparisons (#632)
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
2022-06-17 14:50:57 +09:00
Takeshi Yoneda
338652a182 arm64: bitwise, bit shift, boolean SIMD instructions (#628)
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
2022-06-17 12:31:23 +09:00
Takeshi Yoneda
3068d17c77 interpreter,compiler(amd64): complete SIMD instructions (#624)
This completes the implementation of SIMD proposal for both
the interpreter and compiler(amd64).
This also fixes #210 by adding the complete documentation
over all the wazeroir operations.

Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
Co-authored-by: Crypt Keeper <64215+codefromthecrypt@users.noreply.github.com>
2022-06-15 11:52:47 +09:00
Takeshi Yoneda
94d1d31733 SIMD: implements comparison instructions (#617)
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
Co-authored-by: Crypt Keeper <64215+codefromthecrypt@users.noreply.github.com>
2022-06-03 16:04:08 +09:00
Takeshi Yoneda
6e458acdbc SIMD: implements bitshift operations (#613)
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
2022-06-02 16:51:57 +09:00
Takeshi Yoneda
2e131a1a2c SIMD: implements boolean and bitwise instructions. (#611)
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
2022-06-01 16:42:35 +09:00
Takeshi Yoneda
41a3dd341c Backfill func validation unit tests for SIMD load, store, and lane manipulations (#609)
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
2022-06-01 12:18:08 +09:00
Takeshi Yoneda
0c303258c7 SIMD: implements v128 load, store and lane manipulations. (#588)
This implements various SIMD instructions related to
load, store, and lane manipulations for all engines.

Notablely, now our engines pass the following specification tests:

* simd_address.wast
* simd_const.wast
* simd_align.wast
* simd_laod16_lane.wast
* simd_laod32_lane.wast
* simd_laod64_lane.wast
* simd_laod8_lane.wast
* simd_lane.wast
* simd_load_extend.wast
* simd_load_splat.wast
* simd_load_zero.wast
* simd_store.wast
* simd_store16_lane.wast
* simd_store32_lane.wast
* simd_store64_lane.wast
* simd_store8_lane.wast

part of #484


Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
Co-authored-by: Adrian Cole <adrian@tetrate.io>
2022-06-01 09:30:05 +09:00
Anuraag Agrawal
4b0084217e Follows go style for arm64 constants. (#587)
* Follows go style for arm64 constants.

Signed-off-by: Anuraag Agrawal <anuraaga@gmail.com>

* ZERO -> RZR

Signed-off-by: Anuraag Agrawal <anuraaga@gmail.com>
2022-05-23 16:30:08 +09:00
Takeshi Yoneda
9a9b361ac8 Vector values support in ahead-of-time compiler (#572)
Signed-off-by: Takeshi Yoneda <takeshi@tetrate.io>
Signed-off-by: Adrian Cole <adrian@tetrate.io>
2022-05-19 11:02:15 -06:00