diff --git a/internal/engine/wazevo/backend/compiler.go b/internal/engine/wazevo/backend/compiler.go index 0dd9cc2a..0896ef4f 100644 --- a/internal/engine/wazevo/backend/compiler.go +++ b/internal/engine/wazevo/backend/compiler.go @@ -15,16 +15,11 @@ func NewCompiler(ctx context.Context, mach Machine, builder ssa.Builder) Compile return newCompiler(ctx, mach, builder) } -func newCompiler(ctx context.Context, mach Machine, builder ssa.Builder) *compiler { - registerSetDebug := false - if wazevoapi.RegAllocValidationEnabled { - registerSetDebug = wazevoapi.IsHighRegisterPressure(ctx) - } - +func newCompiler(_ context.Context, mach Machine, builder ssa.Builder) *compiler { c := &compiler{ mach: mach, ssaBuilder: builder, nextVRegID: regalloc.VRegIDNonReservedBegin, - regAlloc: regalloc.NewAllocator(mach.RegisterInfo(registerSetDebug)), + regAlloc: regalloc.NewAllocator(mach.RegisterInfo()), } mach.SetCompiler(c) return c diff --git a/internal/engine/wazevo/backend/isa/arm64/machine_regalloc.go b/internal/engine/wazevo/backend/isa/arm64/machine_regalloc.go index 881d0975..eaa5f479 100644 --- a/internal/engine/wazevo/backend/isa/arm64/machine_regalloc.go +++ b/internal/engine/wazevo/backend/isa/arm64/machine_regalloc.go @@ -320,25 +320,7 @@ func (r *regAllocBlockImpl) BlockParams(regs *[]regalloc.VReg) []regalloc.VReg { func (r *regAllocBlockImpl) Entry() bool { return r.sb.EntryBlock() } // RegisterInfo implements backend.Machine. -func (m *machine) RegisterInfo(debug bool) *regalloc.RegisterInfo { - if debug { - regInfoDebug := ®alloc.RegisterInfo{} - regInfoDebug.CalleeSavedRegisters = regInfo.CalleeSavedRegisters - regInfoDebug.CallerSavedRegisters = regInfo.CallerSavedRegisters - regInfoDebug.RealRegToVReg = regInfo.RealRegToVReg - regInfoDebug.RealRegName = regInfo.RealRegName - regInfoDebug.RealRegType = regInfo.RealRegType - regInfoDebug.AllocatableRegisters[regalloc.RegTypeFloat] = []regalloc.RealReg{ - v18, // One callee saved. - v7, v6, v5, v4, v3, v2, v1, v0, // Allocatable sets == Argument registers. - } - regInfoDebug.AllocatableRegisters[regalloc.RegTypeInt] = []regalloc.RealReg{ - x29, x30, // Caller saved, and special ones. But they should be able to get allocated. - x19, // One callee saved. - x7, x6, x5, x4, x3, x2, x1, x0, // Argument registers (all caller saved). - } - return regInfoDebug - } +func (m *machine) RegisterInfo() *regalloc.RegisterInfo { return regInfo } diff --git a/internal/engine/wazevo/backend/machine.go b/internal/engine/wazevo/backend/machine.go index 8f492bb2..2772f50d 100644 --- a/internal/engine/wazevo/backend/machine.go +++ b/internal/engine/wazevo/backend/machine.go @@ -14,9 +14,7 @@ type ( // RegisterInfo returns the set of registers that can be used for register allocation. // This is only called once, and the result is shared across all compilations. - // - // If debug is true, this returns the register set for debugging purpose. - RegisterInfo(debug bool) *regalloc.RegisterInfo + RegisterInfo() *regalloc.RegisterInfo // InitializeABI initializes the FunctionABI for the given signature. InitializeABI(sig *ssa.Signature) diff --git a/internal/engine/wazevo/backend/machine_test.go b/internal/engine/wazevo/backend/machine_test.go index d831b74d..e9a2ba0f 100644 --- a/internal/engine/wazevo/backend/machine_test.go +++ b/internal/engine/wazevo/backend/machine_test.go @@ -56,7 +56,7 @@ func (m mockMachine) ResolveRelativeAddresses() {} func (m mockMachine) Function() (f regalloc.Function) { return } // RegisterInfo implements Machine.RegisterInfo. -func (m mockMachine) RegisterInfo(bool) *regalloc.RegisterInfo { +func (m mockMachine) RegisterInfo() *regalloc.RegisterInfo { if m.rinfo != nil { return m.rinfo } diff --git a/internal/engine/wazevo/wazevoapi/debug_options.go b/internal/engine/wazevo/wazevoapi/debug_options.go index a846a6e2..01bfff50 100644 --- a/internal/engine/wazevo/wazevoapi/debug_options.go +++ b/internal/engine/wazevo/wazevoapi/debug_options.go @@ -41,18 +41,15 @@ const ( ) // ----- Validations ----- -// These consts must be enabled by default until we reach the point where we can disable them (e.g. multiple days of fuzzing passes). - const ( - RegAllocValidationEnabled = true - SSAValidationEnabled = true + // SSAValidationEnabled enables the SSA validation. This is disabled by default since the operation is expensive. + SSAValidationEnabled = false ) // ----- Stack Guard Check ----- -// These consts must be enabled by default until we reach the point where we can disable them (e.g. multiple days of fuzzing passes). const ( // StackGuardCheckEnabled enables the stack guard check to ensure that our stack bounds check works correctly. - StackGuardCheckEnabled = true + StackGuardCheckEnabled = false StackGuardCheckGuardPageSize = 8096 )